Method for increasing cache directory associativity classes in a system with a register space memory
US8028128B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2007 |
| Grant date | Sep 27, 2011 |
| Priority date | — |
| Expiry date | Jul 27, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0895
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method of managing a cache directory in a memory system, an original system address is presented to the cache directory when corresponding associativity data is allocated to an associativity class in the cache directory. The original system address is normalized by removing address space corresponding to a memory hole, thereby generating a normalized address. The normalized address is stored in the cache directory. The normalized address is de-normalized, thereby generating a de-normalized address, when the associativity data is cast out of the cache directory to make room for new associativity data. The de-normalized address is sent to the memory system for coherency management.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.