Semiconductor device and manufacturing method therefor
US8030691B2 · kind B2 · utility
1Cited by
10References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 10, 2008 |
| Grant date | Oct 4, 2011 |
| Priority date | — |
| Expiry date | Oct 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
An MMIC 100 is a semiconductor device which includes an FET formed on a GaAs substrate 10 and an MIM capacitor having a dielectric layer 20b arranged between a lower electrode 18b and an upper electrode 22b. A method for manufacturing the MMIC 100 is provided, in which a source electrode 16a and a drain electrode 16b of the FET are formed and then a gate electrode 18a of the FET and a lower electrode 18b of the MIM capacitor are formed simultaneously by the lift-off method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.