Semiconductor devices
US8035190B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2010 |
| Grant date | Oct 11, 2011 |
| Priority date | — |
| Expiry date | Mar 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/713
Abstract
A device comprises a first sub-collector formed in an upper portion of a substrate and a lower portion of a first epitaxial layer and a second sub-collector formed in an upper portion of the first epitaxial layer and a lower portion of a second epitaxial layer. The device further comprises a reach-through structure connecting the first and second sub-collectors and an N-well formed in a portion of the second epitaxial layer and in contact with the second sub-collector and the reach-through structure. The device further comprises N+ diffusion regions in contact with the N-well, a P+ diffusion region in contact with the N-well, and shallow trench isolation structures between the N+ and P+ diffusion regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.