Patent · US Active

Tiled cache for multiple software programs

US8035650B2 · kind B2 · utility

5Cited by
3References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 25, 2006
Grant dateOct 11, 2011
Priority date
Expiry dateJul 4, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0842
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Caching techniques for storing instructions, constant values, and other types of data for multiple software programs are described. A cache provides storage for multiple programs and is partitioned into multiple tiles. Each tile is assignable to one program. Each program may be assigned any number of tiles based on the program's cache usage, the available tiles, and/or other factors. A cache controller identifies the tiles assigned to the programs and generates cache addresses for accessing the cache. The cache may be partitioned into physical tiles. The cache controller may assign logical tiles to the programs and may map the logical tiles to the physical tiles within the cache. The use of logical and physical tiles may simplify assignment and management of the tiles.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.