Inventor · San Diego, CA, US

Chun Yu

53Patents
10h-index
49Co-inventors
78Inventor score

Filing activity: Feb 16, 2001 → Oct 16, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US8203564B2 Efficient 2-D and 3-D graphics processing Physics 35 Active
US7685409B2 On-demand multi-thread multimedia processor Emerging Cross-Sectional Technologies 35 Active
US7928990B2 Graphics processing unit with unified vertex cache and shader register file Physics 34 Active
US7737985B2 Pixel cache for 3D graphics circuitry Physics 33 Active
US6575376B2 System with improved methodology for providing international address validation Physics 19 Expired
US8212840B2 3-D clipping in a graphics processing unit Physics 15 Active
US8089486B2 Tiled prefetched and cached depth buffer Physics 14 Active
US8345053B2 Graphics processors with parallel scheduling and execution of threads Physics 13 Active
US8365153B2 Server-based code compilation Physics 12 Active
US8421794B2 Processor with adaptive multi-shader Physics 10 Active
US8325184B2 Fragment shader bypass in a graphics processing unit, and apparatus and method thereof Physics 9 Active
US8436854B2 Graphics processing unit with deferred vertex shading Physics 8 Active
US8644643B2 Convolution filtering in a graphics processor Physics 8 Active
US8633936B2 Programmable streaming processor with mixed precision instruction execution Physics 8 Active
US8035650B2 Tiled cache for multiple software programs Physics 5 Active
US9799089B1 Per-shader preamble for graphics processing Physics 5 Active
US8458497B2 Demand based power control in a graphics processing unit Emerging Cross-Sectional Technologies 5 Active
US7805589B2 Relative address generation Physics 5 Active
US7973797B2 Programmable blending in a graphics processing unit Physics 5 Active
US8291431B2 Dependent instruction thread scheduling Physics 4 Active
US8355028B2 Scheme for varying packing and linking in graphics systems Physics 4 Active
US8869147B2 Multi-threaded processor with deferred thread output control Emerging Cross-Sectional Technologies 4 Active
US8766996B2 Unified virtual addressed register file Physics 4 Active
US8773459B2 3-D clipping in a graphics processing unit Physics 3 Active
US9342461B2 Cache memory system and method using dynamically allocated dirty mask space Physics 3 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.