3D integration of vertical components in reconstituted substrates
US8039306B2 · kind B2 · utility
1Cited by
23References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2008 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Jun 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A reconstituted electronic device including: a first face and a second face; a plurality of individual chips placed perpendicular to the faces, each individual chip carrying, on one of its surfaces, at least one component, tracks, and a connection mechanism that are flush with one or other of the faces of the reconstituted electronic device; and an encapsulant that encapsulates the individual chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.