Thermally enhanced wafer level package
US8039315B2 · kind B2 · utility
21Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2010 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Jul 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a package structure includes providing a plurality of dies; attaching the plurality of dies onto a heat-dissipating plate; and sawing the heat-dissipating plate into a plurality of packages, each including one of the plurality of dies and a piece of the heat-dissipating plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.