Method of manufacturing a buried-gate semiconductor device and corresponding integrated circuit

US8039332B2 · kind B2 · utility

Assignees

• STMicroelectronics (Crolles 2) SAS · FR
• STMicroelectronics (Grenoble 2) SAS · FR
• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Emilie Bernard · Grenoble, FR
• Bernard Guillaumot · Le Fontanil, FR
• Philippe Coronel · Barraux, FR
• Christian Vizioz · Le Pont-de-Claix, FR

Key dates

• Filing date: Feb 12, 2009
• Grant date: Oct 18, 2011
• Expiry date: Sep 4, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6757

Abstract

A semiconductor device includes a semiconductor channel region and a gate region, wherein the gate region includes at least one buried part extending under the channel region. The buried part of the gate region is formed from a cavity under the channel region. The cavity is filled with a first material. An opening is made to access the first material. In one implementation, aluminium is deposited in the opening in contact with the first material. An anneal is performed to cause the aluminium to be substituted for the first material in the cavity. In another implementation, a second material different from the first material is deposited in the opening. An anneal is performed to cause an alloy of the first and second materials to be formed in the cavity.