Patent · US Active

Multilayered semiconductor wafer and process for manufacturing the same

US8039361B2 · kind B2 · utility

5Cited by
3References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 22, 2007
Grant dateOct 18, 2011
Priority date
Expiry dateMar 25, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76254
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The invention relates to a process for manufacturing a multilayered semiconductor wafer comprising a handle wafer (5) and a layer (40) comprising silicon carbide bonded to the handle wafer (5), the process comprising the steps of: a) providing a handle wafer (5), b) providing a donor wafer (1) comprising a donor layer (2) and a remainder (3) of the donor wafer, the donor layer (2) comprising monocrystalline silicon, e) bonding the donor layer (2) of the donor wafer (1) to the handle wafer (5), and f) removing the remainder (3) of the donor wafer in order to expose the donor layer (2) which remains bonded to the handle wafer (5), the process being characterized by further steps of c) implanting carbon ions into the donor layer (2) in order to produce a layer (4) comprising implanted carbon, and d) heat-treating the donor layer (2) comprising the layer (4) comprising implanted carbon in order to form a silicon carbide donor layer (44) in at least part of the donor layer (2). The invention also relates to a multilayered semiconductor wafer comprising a handle wafer (5) and a silicon carbide donor layer (44) which is bonded to the handle wafer (5), wherein the silicon carbide donor lay…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.