Pattern evaluation method, computer-readable medium, and semiconductor device manufacturing method
US8041105B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2007 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Jul 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pattern evaluation method includes: acquiring a plurality of examination images obtained in regard to an evaluation target pattern, at least one of the plurality of examination images being different from the other examination images; detecting all edges of the evaluation target pattern in each of the examination images; executing alignment of the evaluation target pattern in the respective examination images with a sub-pixel accuracy based on the detected edges; superimposing the aligned pattern edges to generate a single combined edge; measuring the combined edge; and evaluating the evaluation target pattern based on a result of the measurement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.