Data error correction circuit, integrated circuit for data error correction, and method of performing data error correction
US8042020B2 · kind B2 · utility
1Cited by
4References
19Claims
0Family size
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Key dates
| Filing date | Jul 3, 2007 |
| Grant date | Oct 18, 2011 |
| Priority date | — |
| Expiry date | Apr 28, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/43
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data error correction circuit includes a plurality of one-bit registers, a data error detection unit and a data error correction unit. The data error detection unit detects whether all the data values stored in the plurality of the registers are equal. The data correction unit determines a correct data value based upon each of the stored data values, and corrects each of the data values into the determined correct data value if the data values are not equal. Therefore, the data error correction circuit may correct a data error due to electrostatic discharge (ESD) or electromagnetic interference (EMI).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.