Methods of seamless gap filling
US8043884B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2010 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | May 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76232
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for seamless gap filling is provided, including providing a semiconductor structure with a device layer having a gap therein, wherein the gap has an aspect ratio greater than 4. A liner layer is formed over the device layer exposed by the gap. A first un-doped oxide layer is formed over the liner layer in the gap. A doped oxide layer is formed over the first undoped oxide layer in the gap. A second un-doped oxide layer is formed over the doped oxide layer in the gap to fill the gap. An annealing process is performed on the second un-doped oxide layer, the doped oxide layer, and the first un-doped oxide to form a seamless oxide layer in the gap, wherein the seamless oxide layer has an interior doped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.