Mask overhang reduction or elimination after substrate etch
US8043973B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2009 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Dec 2, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/978
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming IC devices includes providing a substrate and forming a patterned masking layer including at least one masked region having at least one masking layer, and a feature region bounded by the masking layer. Etching forms an etched feature in the substrate, wherein undercutting during the etching forms at least one mask overhang region over a surface portion of the etched feature that is recessed relative to an outer edge of the masking layer. A pullback etch process exclusive of any additional patterning step laterally etches the masking layer. The conditions for the pullback etch retain at least a portion of the masking layer and reduce a length of the mask overhang region by at least 50%, or eliminate the mask overhang region entirely. The etched feature is then filled after the pullback etch process to form a filled etched feature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.