Nonvolatile semiconductor memory device
US8044448B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2009 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Jan 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device includes: a memory cell array region having memory cells connected in series; a control circuit region disposed below the memory cell array region; and an interconnection portion electrically connecting the control circuit region and the memory cell array region. The memory cell array region includes: a plurality of first memory cell regions having the memory cells; and a plurality of connection regions. The interconnection portion is provided in the connection regions. The first memory cell regions are provided at a first pitch in a first direction orthogonal to a lamination direction of the memory cell array region and the control circuit region. The connection regions are provided between the first memory cell regions mutually adjacent in the first direction, and at a second pitch in a second direction orthogonal to the lamination direction and the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.