QFN semiconductor package
US8044496B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2010 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Jul 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A QFN semiconductor package includes a die attach pad; a semiconductor die mounted on the die attach pad; an inner terminal lead disposed adjacent to the die attach pad; a first wire bonding the inner terminal lead to the semiconductor die; an extended, outer terminal lead disposed along periphery of the QFN semiconductor package, wherein the extended, outer terminal lead is disposed beyond a maximum wire length which is provided for a specific minimum pad opening size on the semiconductor die; an intermediary terminal disposed between the inner terminal lead and the extended, outer terminal lead; a second wire bonding the intermediary terminal to the semiconductor die; and a trace interconnecting the intermediary terminal to the extended, outer terminal lead.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.