Data output circuit in a semiconductor memory apparatus
US8045399B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 25, 2009 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Jan 1, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1057
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data output circuit in a semiconductor memory apparatus includes a pre-driver configured to receive input data and then produce a pull-up signal and a pull-down signal, a pull-up driver configured to pull-up drive a first node in response to the pull-up signal and provide an additional pull-up drive when a voltage level on the first node transitions, a pull-down driver configured to pull-down drive a second node in response to the pull-down signal and provide an additional pull-down drive when a voltage level on the second node transitions, and a pad coupled to the first and second nodes to generate output data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.