Systems and methods of editing cells of an electronic circuit design
US8046730B1 · kind B1 · utility
46Cited by
5References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2008 |
| Grant date | Oct 25, 2011 |
| Priority date | — |
| Expiry date | Mar 28, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods to enable a user to edit subMaster content of selected instances of an electronic layout design, including editing the contents of selected instances of an existing subMaster of an EDA design, generating a new subMaster to incorporate the modified contents of the selected instances, and binding the new subMaster to the selected instances without losing the design hierarchy of the layout design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.