Semiconductor device with gate-undercutting recessed region
US8049254B2 · kind B2 · utility
4Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2009 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Jun 4, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a gate structure on a semiconductor substrate and a recessed region in the semiconductor substrate. The recessed region has a widest lateral opening that is near a top surface of the semiconductor substrate. The widest lateral opening undercuts the gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.