Semiconductor device with increased channel length and method for fabricating the same
US8049262B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 13, 2007 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Mar 3, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
Abstract
A semiconductor device includes a trench formed in a predetermined portion of a substrate and a first recess region beneath the trench. A field oxide layer is buried into both the trench and the first recess region. An active region is defined by the field oxide layer, having a first active region and a second active region. The latter has a second recess region formed in a lower portion of the active region than the former. A step gate pattern is formed on a border region between the first active region and the second active region. The gate pattern has a step structure whose one side extends to a surface of the first active region and the other side extends to a surface of the second active region. Other embodiments are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.