Memory management system and method providing linear address based memory access security
US8051301B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2001 |
| Grant date | Nov 1, 2011 |
| Priority date | — |
| Expiry date | Mar 3, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management unit (MMU) is disclosed for managing a memory storing data arranged within a plurality of memory pages. The MMU includes a security check unit (SCU) receiving a linear address generated during execution of a current instruction. The linear address has a corresponding physical address residing within a selected memory page. The SCU uses the linear address to access one or more security attribute data structures located in the memory to obtain a security attribute of the selected memory page. The SCU compares a numerical value conveyed by a security attribute of the current instruction to a numerical value conveyed by the security attribute of the selected memory page, and produces an output signal dependent upon a result of the comparison. The MMU accesses the selected memory page dependent upon the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.