Semiconductor device and method of forming gate and metal line thereof with dummy pattern and auxiliary pattern
US8053346B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2008 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | May 19, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/926
Abstract
A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.