Patent · US Active

Wafer level vertical diode package structure and method for making the same

US8053885B2 · kind B2 · utility

0Cited by
7References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 12, 2009
Grant dateNov 8, 2011
Priority date
Expiry dateAug 14, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/181
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral side of the first semiconductor layer and a lateral side of the second semiconductor layer. The first conductive structure is formed on a top surface of the first semiconductor layer and on one lateral side of the insulative layer. The second conductive structure is formed on a top surface of the second semiconductor layer and on another opposite lateral side of the insulative layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.