Semiconductor device
US8054680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2004 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | May 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3468
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory cells in which an erase and write operation is performed by injecting electrons from a substrate and extracting the electrons into a gate electrode constitute a semiconductor nonvolatile memory device. That is a gate extraction semiconductor nonvolatile memory device. In that device, if an erase bias is applied in a first process of an erase and write operation, memory cells in an overerase condition occur and the charge retention characteristics of such memory cells are degraded. The present invention provides a semiconductor nonvolatile memory device using means for writing all the memory cells in an erase unit before applying the erase bias, and then applying the erase bias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.