Read, verify word line reference voltage to track source level
US8054681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2010 |
| Grant date | Nov 8, 2011 |
| Priority date | — |
| Expiry date | Jul 2, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device has individual pages of memory cells to be sensed in parallel. The memory device includes a source level tracking circuit coupled to receive a predetermined word line voltage from a word line voltage supply and the voltage level at the aggregate source node of one or more pages and coupled to provide to word lines of the memory an output voltage during the sensing operation, where the source level tracking circuit includes an op amp whereby the output voltage is the word line voltage offset by an amount to track the voltage level at the aggregate node and compensate for source bias errors due to a finite resistance in the ground loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.