Method for fabrication of a semiconductor device and structure
US8058137B1 · kind B1 · utility
103Cited by
23References
20Claims
0Family size
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Key dates
| Filing date | Apr 11, 2011 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Apr 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/125
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor wafer, the method including: providing a base wafer including a semiconductor substrate, metal layers and first alignment marks; transferring a monocrystalline layer on top of the metal layers, wherein the monocrystalline layer includes second alignment marks; and performing a lithography using at least one of the first alignment marks in a first direction and at least one of the second alignment marks in a second direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.