Brian Cronquist
272Patents
25h-index
19Co-inventors
87Inventor score
Filing activity: Feb 27, 1995 → May 6, 2025
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8541819B1 | Semiconductor device and structure | Electricity | 135 | Active |
| US8058137B1 | Method for fabrication of a semiconductor device and structure | Electricity | 103 | Active |
| US9640531B1 | Semiconductor device, structure and methods | Electricity | 91 | Active |
| US8803206B1 | 3D semiconductor device and structure | Electricity | 78 | Active |
| US8273610B2 | Method of constructing a semiconductor device and structure | Electricity | 75 | Active |
| US8298875B1 | Method for fabrication of a semiconductor device and structure | Electricity | 68 | Active |
| US10014292B2 | 3D semiconductor device and structure | Electricity | 55 | Active |
| US8674470B1 | Semiconductor device and structure | Electricity | 52 | Active |
| US8237228B2 | System comprising a semiconductor device and structure | Electricity | 48 | Active |
| US8754533B2 | Monolithic three-dimensional semiconductor device and structure | Electricity | 47 | Active |
| US9117749B1 | Semiconductor device and structure | Electricity | 42 | Active |
| US8581349B1 | 3D memory semiconductor device and structure | Electricity | 40 | Active |
| US10297586B2 | Methods for processing a 3D semiconductor device | Electricity | 40 | Active |
| US8395191B2 | Semiconductor device and structure | Electricity | 39 | Active |
| US8642416B2 | Method of forming three dimensional integrated circuit devices using layer transfer technique | Electricity | 37 | Active |
| US9136153B2 | 3D semiconductor device and structure with back-bias | Electricity | 36 | Active |
| US9023688B1 | Method of processing a semiconductor device | Electricity | 35 | Active |
| US8686428B1 | Semiconductor device and structure | Electricity | 32 | Active |
| US8153499B2 | Method for fabrication of a semiconductor device and structure | Electricity | 32 | Active |
| US5488244A | Electrically erasable and programmable read only memory cell | Electricity | 30 | Expired |
| US8557632B1 | Method for fabrication of a semiconductor device and structure | Electricity | 29 | Active |
| US10217667B2 | 3D semiconductor device, fabrication method and system | Electricity | 29 | Active |
| US9219005B2 | Semiconductor system and device | Electricity | 28 | Active |
| US7964916B2 | Method for fabrication of a semiconductor device and structure | Electricity | 28 | Active |
| US8362482B2 | Semiconductor device and structure | Electricity | 25 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.