Memory systems and memory modules
US8060774B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2007 |
| Grant date | Nov 15, 2011 |
| Priority date | — |
| Expiry date | Sep 13, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention sets forth a memory module that includes at least one memory chip, and an intelligent chip coupled to the at least one memory chip and a memory controller, where the intelligent chip is configured to implement at least a part of a RAS feature. The disclosed architecture allows one or more RAS features to be implemented locally to the memory module using one or more intelligent register chips, one or more intelligent buffer chips, or some combination thereof. Such an approach not only increases the effectiveness of certain RAS features that were available in prior art systems, but also enables the implementation of certain RAS features that were not available in prior art systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.