Michael J. Smith
246Patents
65h-index
202Co-inventors
93Inventor score
Filing activity: Nov 18, 1974 → Apr 13, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8990235B2 | Automatically providing content associated with captured information, such as information captured in real-time | Physics | 348 | Active |
| US8638363B2 | Automatically capturing information, such as capturing information using a document-aware device | Electricity | 218 | Active |
| US8810392B1 | Device and method for monitoring the presence of items and issuing an alert if an item is not detected | Physics | 215 | Active |
| US8156275B2 | Power managed lock optimization | Physics | 196 | Active |
| US8397013B1 | Hybrid memory module | Electricity | 192 | Active |
| US7535913B2 | Gigabit ethernet adapter supporting the iSCSI and IPSEC protocols | Electricity | 154 | Expired |
| US7472220B2 | Interface circuit system and method for performing power management operations utilizing power management signals | Physics | 150 | Active |
| US7870992B2 | Container with freestanding insulating encapsulated cellulose-based substrate | Emerging Cross-Sectional Technologies | 146 | Active |
| US7386656B2 | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit | Physics | 139 | Active |
| US7590796B2 | System and method for power management in memory systems | Physics | 138 | Active |
| US7724589B2 | System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits | Physics | 137 | Active |
| US7761724B2 | Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit | Physics | 136 | Active |
| US7392338B2 | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits | Physics | 135 | Active |
| US7581127B2 | Interface circuit system and method for performing power saving operations during a command-related latency | Physics | 134 | Active |
| US7609567B2 | System and method for simulating an aspect of a memory circuit | Physics | 133 | Active |
| US7730338B2 | Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits | Physics | 133 | Active |
| US7580312B2 | Power saving system and method for use with a plurality of memory circuits | Physics | 132 | Active |
| US8089795B2 | Memory module with memory stack and interface with enhanced capabilities | Electricity | 131 | Active |
| US5601871A | Soft treated uncreped throughdried tissue | Emerging Cross-Sectional Technologies | 126 | Expired |
| US5614293A | Soft treated uncreped throughdried tissue | Emerging Cross-Sectional Technologies | 117 | Expired |
| US8130560B1 | Multi-rank partial width memory modules | Physics | 116 | Active |
| US8081474B1 | Embossed heat spreader | Electricity | 111 | Active |
| US8060774B2 | Memory systems and memory modules | Electricity | 110 | Active |
| US5713678A | Low-paper sensing apparatus | Performing Operations; Transporting | 98 | Expired |
| US8447066B2 | Performing actions based on capturing information from rendered documents, such as documents under copyright | Electricity | 95 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.