Method for manufacturing multilayer printed wiring board and multilayer printed wiring board obtained by the same
US8062539B2 · kind B2 · utility
2Cited by
5References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2005 |
| Grant date | Nov 22, 2011 |
| Priority date | — |
| Expiry date | Apr 4, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a multilayer printed wiring board which enables the dielectric layers to have excellent thickness uniformity, the capacitor circuits to have high registration accuracy and the unnecessary dielectric layer is removed as large as possible; and a multilayer printed wiring board with an embedded capacitor circuit manufactured by the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.