Method for enhancing the reliability of a P-channel semiconductor device and a P-channel semiconductor device made thereof

US8062962B2 · kind B2 · utility

Assignees

• IMEC · BE
• Katholieke Universiteit Leuven · BE

Inventors

• Benjamin Kaczer · Leuven, BE
• Jacopo Franco · Leuven, BE

Key dates

• Filing date: Oct 12, 2010
• Grant date: Nov 22, 2011
• Expiry date: Oct 12, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/685

Abstract

A method for forming a semiconductor device is disclosed. The device includes a control electrode on a semiconductor P-channel layer having at least a gate dielectric layer. The gate dielectric layer has an exponentially decreasing density of defect levels Et in as function of energy from the band edges of the adjacent layer (the semiconductor P-channel layer or optionally the capping layer) toward the center of the bandgap of this layer. The method includes selecting at least one parameter of the P-channel semiconductor device such that the inversion carrier injection into the distribution of defect levels deviates from the energy level at the center of the bandgap of a layer adjacent the gate dielectric layer at the same side of the gate dielectric layer as the P-channel layer, with a value not more than about 49%, such as not more than about 40%, for example not more than about 20%, not more than about 10%, even not more than about 5% of that bandgap in eV. In one aspect, this allows reducing NBTI.