Method of fabricating a semiconductor device having an epitaxy region
US8062963B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 8, 2010 |
| Grant date | Nov 22, 2011 |
| Priority date | — |
| Expiry date | Oct 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is described which includes providing a semiconductor substrate and forming a trench in the semiconductor substrate. An epitaxy region is grown in the trench. An amorphous layer is deposited overlying the epitaxy region. The semiconductor substrate is then annealed. The anneal may convert a portion of the amorphous layer to crystalline material, as found in the epitaxy region. A chemical mechanical polish (CMP) is then performed, which may remove a portion of the amorphous layer which has not been converted. In an embodiment, the amorphous layer and epitaxy region are germanium and the semiconductor substrate is silicon. The formed crystalline region may be used to form a channel of a p-type device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.