Inventor · Linden, BE

Mark van Dal

82Patents
10h-index
22Co-inventors
74Inventor score

Filing activity: Feb 2, 2007 → Jun 23, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9214555B2 Barrier layer for FinFET channels Electricity 531 Active
US9520466B2 Vertical gate-all-around field effect transistors and methods of forming same Electricity 118 Active
US8062963B1 Method of fabricating a semiconductor device having an epitaxy region Electricity 57 Active
US8766364B2 Fin field effect transistor layout for stress optimization Electricity 39 Active
US8148052B2 Double patterning for lithography to increase feature spatial density Electricity 32 Active
US9991169B2 Semiconductor device and formation thereof Electricity 14 Active
US8987835B2 FinFET with a buried semiconductor material between two fins Electricity 14 Active
US8722520B2 Method of fabricating a semiconductor device having an epitaxy region Electricity 12 Active
US9761666B2 Strained channel field effect transistor Electricity 11 Active
US9711647B2 Thin-sheet FinFET device Electricity 11 Active
US8823102B2 Device with a strained Fin Electricity 10 Active
US9349860B1 Field effect transistors and methods of forming same Electricity 9 Active
US9472468B2 Nanowire CMOS structure and formation methods Electricity 9 Active
US9412871B2 FinFET with channel backside passivation layer device and method Electricity 8 Active
US10756174B2 Multiple-stacked semiconductor nanowires and source/drain spacers Electricity 7 Active
US10170378B2 Gate all-around semiconductor device and manufacturing method thereof Electricity 7 Active
US10453752B2 Method of manufacturing a gate-all-around semiconductor device Electricity 7 Active
US9768252B2 Vertical gate-all-around field effect transistors Electricity 6 Active
US8829606B1 Ditches near semiconductor fins and methods for forming the same Electricity 5 Active
US10629501B2 Gate all-around semiconductor device including a first nanowire structure and a second nanowire structure Electricity 5 Active
US9184233B2 Structure and method for defect passivation to reduce junction leakage for finFET device Electricity 5 Active
US10770358B2 Semiconductor device and manufacturing method thereof Electricity 4 Active
US9876088B1 III-V semiconductor layers, III-V semiconductor devices and methods of manufacturing thereof Electricity 4 Active
US10535780B2 Semiconductor device including an epitaxial layer wrapping around the nanowires Electricity 4 Active
US7791140B2 Double-gate semiconductor devices having gates with different work functions and methods of manufacture thereof Electricity 3 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.