Method for integration of replacement gate in CMOS flow

US8062966B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Freido Mehrad · Plano, US
• James Joseph Chambers · Dallas, US
• Shaofeng Yu · Plano, US

Key dates

• Filing date: Dec 24, 2009
• Grant date: Nov 22, 2011
• Expiry date: Jun 7, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0227

Abstract

Semiconductor devices and fabrication methods are provided, in which metal transistor replacement gates are provided for CMOS transistors. The process provides dual or differentiated work function capability (e.g., for PMOS and NMOS transistors) in CMOS processes.