High yield plasma etch process for interlayer dielectrics

US8062982B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Daniel Fischer · Furth, DE
• Matthias Schaller · Dresden, DE
• Matthias Lehr · Dresden, DE
• Kornelia Dittmar · Dresden, DE

Key dates

• Filing date: Oct 5, 2007
• Grant date: Nov 22, 2011
• Expiry date: Feb 21, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/31138
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A high yield plasma etch process for an interlayer dielectric layer of a semiconductor device is provided, according to an embodiment of which a dielectric layer is etched with a nitrogen-containing plasma. In this way, the formation of polymers on a backside bevel of a substrate is avoided or substantially reduced. Remaining polymer at the backside bevel can be removed in situ by post-etch treatment. Further, a plasma etching device is provided comprising a chamber, a substrate receiving space for receiving a substrate, a plasma generator for generating a plasma in the chamber and a temperature conditioner for conditioning a temperature at an outer circumferential region of the substrate receiving space and thereby minimizing temperature gradients at a bevel of the wafer.