Patent · US Active

Integrated circuit

US8063394B2 · kind B2 · utility

9Cited by

7References

9Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Dieter Andres · Munich, DE
Rainer Bruchhaus · Yokohama, JP
Ulrike Gruening-von Schwerin · Munich, DE
Ulrich Klostermann · Fontainebleau, FR
Franz Kreupl · Mountain View, US
Michael Kund · Bad Aibling, DE
Petra Majewski · Munich, DE
Christian Ruester · Augsburg, DE
Bernhard Ruf · Sauerlach, DE
Ralf Symanczyk · Bad Aibling, DE
Klaus-Dieter Ufert · Unterschleißheim, DE

Key dates

Filing date	Oct 8, 2008
Grant date	Nov 22, 2011
Priority date	—
Expiry date	Nov 29, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH10B63/30
WIPO fieldMicro-structural and nano-technology
WIPO sectorChemistry

Abstract

According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of the first electrode that faces the resistance changing memory element is smaller than a front surface area of an end section of the second electrode that faces the resistance changing memory element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.