Nonvolatile semiconductor memory device

US8063433B2 · kind B2 · utility

Assignee

• RENESAS ELECTRONICS CORPORATION · JP

Inventors

• Tetsuya Ishimaru · Tokyo, JP
• Yasuhiro Shimamoto · Leuven, BE
• Toshiyuki Mine · Fussa, JP
• Yasunobu Aoki · Tokyo, JP
• Koichi Toba · Tachikawa, JP
• Kan Yasui · Kodaira, JP

Key dates

• Filing date: Apr 24, 2008
• Grant date: Nov 22, 2011
• Expiry date: Jan 21, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/685

Abstract

A memory cell includes an ONO film composed of a stacked film of a silicon nitride film SIN which is a charge trapping portion and oxide films BOTOX and TOPOX positioned under and over the silicon nitride film, a memory gate electrode MG over the ONO film, a source region MS, and a drain region MD, and program or erase is performed by hot carrier injection in the memory cell. In the memory cell, a total concentration of N—H bonds and Si—H bonds contained in the silicon nitride film SIN is made to be 5×1020 cm−3 or less.