Patent · US Active

Output stage, amplifier control loop and use of the output stage

US8063668B2 · kind B2 · utility

0Cited by
13References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 23, 2005
Grant dateNov 22, 2011
Priority date
Expiry dateApr 20, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03F2203/45648
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An output stage includes a first transistor pair with a first conductivity type and a second transistor pair with a second conductivity type. The source connections of the first and second transistors in the first transistor pair and of the first and second transistors in the second transistor pair are respectively connected to a first and a second circuit node. The output stage further includes a first current mirror with the first conductivity type and a second current mirror with the second conductivity type. The current mirror transistors are connected to the signal output. The signal input is connected to control connections of the first transistors in the first and second transistor pairs. A second connection of the second transistor in the first transistor pair is connected to the second current mirror, and a second connection of the second transistor in the second transistor pair is connected to the first current mirror.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.