Level shift circuit
US8063690B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 25, 2010 |
| Grant date | Nov 22, 2011 |
| Priority date | — |
| Expiry date | May 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45534
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention provides a level shift circuit that prevents an offset when the supply voltage changes. A level shift circuit has a differential amplification circuit, a current generation circuit, a capacitor and a holding circuit. An input signal from the optical pickup is inputted to the non-inversion input terminal of the differential amplification circuit. First, by turning on a first switch, a feedback loop is formed by the differential amplification circuit, the current generation circuit and the capacitor to perform a level shift, and the voltage charged in the capacitor is held by the holding circuit. Then by turning off the first switch and turning on a second switch, the voltage held by the holding circuit is applied to the non-inversion input terminal of the differential amplification circuit to perform a level shift.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.