Wafer dicing using scribe line etch
US8071429B1 · kind B1 · utility
15Cited by
0References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2010 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Nov 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/199
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of a method for separating dies from a wafer having first and second sides. The process embodiment includes masking the first side of the wafer, the mask including openings therein to expose parts of the first side substantially aligned with scribe lines of the wafer. The process embodiment also includes etching from the exposed parts of the first side of the wafer until an intermediate position between the first and second sides and sawing the remainder of the wafer, starting from the intermediate position until reaching the second surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.