Method for forming highly strained source/drain trenches

US8071481B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Ta-Wei Kao · Taipei, TW
• Shiang-Bau Wang · Taoyuan, TW
• Ming-Jie Huang · Hsinchu, TW
• Chi-Hsi Wu · Hsinchu, TW
• Shu-Yuan Ku · Dashulong, TW

Key dates

• Filing date: Apr 23, 2009
• Grant date: Dec 6, 2011
• Expiry date: Oct 8, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/021

Abstract

A multi-step etching process produces trench openings in a silicon substrate that are immediately adjacent transistor structures formed over the substrate surface. The multi-step etching process is a Br-based etching operation with one step including nitrogen and a further step deficient of nitrogen. The etching process does not attack the transistor structure and forms an opening bounded by upper surfaces that extend downwardly from the substrate surface and are substantially vertical, and lower surfaces that bulge outwardly from the upper vertical sections and undercut the transistor structure. The aggressive undercut produces a desirable stress in the etched silicon surface. The openings are then filled with a suitable source/drain material and SSD transistors with desirable Idsat characteristics may then be formed.