Patent · US Active

Systems, circuits, chips and methods with protection at power island boundaries

US8072719B2 · kind B2 · utility

1Cited by
9References
50Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 31, 2007
Grant dateDec 6, 2011
Priority date—
Expiry dateJan 10, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K17/162
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Integrated circuits where the standard isolation cell, at power island boundaries, also includes a protection device, which clamps transient voltages.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.