Semiconductor package with a mold material encapsulating a chip and a portion of a lead frame
US8072770B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2009 |
| Grant date | Dec 6, 2011 |
| Priority date | — |
| Expiry date | Apr 29, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various exemplary embodiments provide components, devices, and methods of semiconductor packaging. The disclosed packaging component can include a mold material disposed around a lead frame and at least an integrated circuit (IC), wherein the IC is electrically connected with one side of the lead frame. The opposite side of the lead frame including, for example, lead segments, can be exposed from the mold material. A variety of other components, devices, and packages can then be assembled, e.g., over the disclosed packaging component, through the exposed regions so as to improve packaging densities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.