Method of forming self-aligned contacts and local interconnects
US8076230B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 20, 2009 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Oct 9, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for simultaneous formation of a self-aligned contact of a core region and a local interconnect of a peripheral region of an integrated circuit includes etching a cap dielectric layer to simultaneously form a hole in the core region and a trench in the peripheral region of the cap dielectric layer, etching a dielectric layer to simultaneously form a hole in the core region and a trench in the peripheral region of the dielectric layer of the dielectric layer, etching a liner layer simultaneously on a shoulder of sidewall spacers associated with the hole and with the trench of the dielectric layer without etching the liner layer at a bottom area of the hole and the trench, performing an oxygen flushing to remove polymer residues, and etching simultaneously through the liner layer that lines the bottom area of the hole and the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.