Method and apparatus for 3D interconnect
US8076237B2 · kind B2 · utility
520Cited by
32References
42Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 9, 2008 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Dec 30, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses methods for depositing a material, particularly a conductive material, in cavities of a substrate and forming bonding contacts or pads thereon. An intracavity structure may be utilized in conjunction with embodiments of the present invention to provide efficient filling of diverse cavities within the substrate. Also provided are embodiments for interconnection structures using filled cavities, along with electrically conductive or reactive structures which may include capacitors fabricated within a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.