Nonvolatile semiconductor memory device
US8076709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2010 |
| Grant date | Dec 13, 2011 |
| Priority date | — |
| Expiry date | Sep 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a situation where a memory cell includes an ONO film, which comprises a silicon nitride film for charge storage and oxide films positioned above and below the silicon nitride film; a memory gate above the ONO film; a select gate, which is adjacent to a lateral surface of the memory gate via the ONO film; a gate insulator positioned below the select gate; a source region; and a drain region, an erase operation is performed by injecting holes generated by BTBT into the silicon nitride film while applying a positive potential to the source region, applying a negative potential to the memory gate, applying a positive potential to the select gate, and flowing a current from the drain region to the source region, thus improving the characteristics of a nonvolatile semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.