Patent · US Active

Low power SSTL memory controller

US8077526B1 · kind B1 · utility

2Cited by

2References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Scott Schlachter · San Jose, US
Steven E. McNeil · Rio Rancho, US
Kevin A. Mefford · Austin, US

Key dates

Filing date	Jan 30, 2009
Grant date	Dec 13, 2011
Priority date	—
Expiry date	Mar 21, 2030

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit device having configurable resources is configured as a memory controller that includes a plurality of bi-directional pins, an input buffer circuit that is operable to receive SSTL-compliant input and an output buffer that is operable to generate SSTL-compliant output. The input buffer circuit includes a first single-ended buffer coupled to a first voltage source and to a ground voltage. The first single-ended buffer has an input coupled to one of the bi-directional pins and has an output coupled to the control logic of the memory controller.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.