Patent · US Active

Hardware description interface for a high-level modeling system

US8079013B1 · kind B1 · utility

10Cited by
8References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 19, 2008
Grant dateDec 13, 2011
Priority date
Expiry dateNov 5, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/30
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer-implemented method of specifying a circuit design within a high-level modeling system (HLMS) can include, responsive to a scripted user input, instantiating a first and a second block objects within a hardware description interface (HDI) that is communicatively linked with the HLMS and, responsive to instantiating the first and second block objects, creating and displaying, within the HLMS, first and second modeling blocks representing the first and second xBlock objects respectively. Responsive to instantiating, within the HDI, a signal object bound to an output port of the first block object and an input port of the second block object, a modeling line can be created and displayed within the HLMS visually linking an output of the first modeling block with an input of the second modeling block. The first modeling block, second modeling block, and modeling line can be stored as a description of the circuit design.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.