Electronic device on substrate with cavity and mitigated parasitic leakage path
US8080854B2 · kind B2 · utility
2Cited by
271References
8Claims
0Family size
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Key dates
| Filing date | Dec 22, 2008 |
| Grant date | Dec 20, 2011 |
| Priority date | — |
| Expiry date | Mar 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H9/172
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic device. The electronic device includes a first electrode and a coating layer. The electronic device is fabricated on a substrate; the substrate has a cavity created in a top surface of the substrate; and the first electrode is electrically coupled to the substrate. The coating layer coats at least part of a substrate surface in the cavity, and the presence of the coating layer results in a mitigation of at least one parasitic leakage path between the first electrode and an additional electrode fabricated on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.