Method and apparatus for executing instructions
US8082420B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2007 |
| Grant date | Dec 20, 2011 |
| Priority date | — |
| Expiry date | Jun 8, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3851
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for executing instructions in a processor are provided. In one embodiment of the invention, the method includes receiving a plurality of instructions. The plurality of instructions includes first instructions in a first thread and second instructions in a second thread. The method further includes forming a common issue group including an instruction of a first instruction type and an instruction of a second instruction type. The method also includes issuing the common issue group to a first execution unit and a second execution unit. The instruction of the first instruction type is issued to the first execution unit and the instruction of the second instruction type is issued to the second execution unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.