Method and structures for improving substrate loss and linearity in SOI substrates
US8089126B2 · kind B2 · utility
8Cited by
7References
5Claims
0Family size
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Key dates
| Filing date | Jul 22, 2009 |
| Grant date | Jan 3, 2012 |
| Priority date | — |
| Expiry date | Feb 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and structures for improving substrate loss and linearity in SOI substrates. The methods include forming damaged crystal structure regions under the buried oxide layer of SOI substrates and the structures included damaged crystal structure regions under the buried oxide layer of the SOI substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.